Job Summary
A company is looking for a Senior Staff Physical Design Engineer.
Key Responsibilities
- Maintain, enhance, and support the Place and Route Flow using industry-standard EDA tools
- Perform synthesis, place and route, and timing analysis on complex logic blocks
- Collaborate with RTL design and global timing teams to address congestion and timing issues
Required Qualifications
- Bachelor's degree in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience, or a Master's/PhD with 3-5 years of experience
- Completion of a digital logic course and projects involving circuit design, testing, and timing analysis
- Understanding of standard RTL to GDS flows and methodology
- Scripting skills in Perl, Tcl, and Python
- Knowledge of Verilog/VHDL and digital logic concepts
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