Job Summary
A company is looking for an ASIC Physical Design Engineer.
Key Responsibilities
- Execute end-to-end ASIC/SoC physical design flow from RTL/gate netlist to tape-out
- Perform floorplanning, die sizing, macro/IO placement, and congestion analysis
- Run synthesis, apply constraints, and support multi-corner multi-mode (MCMM) optimization
Required Qualifications
- 10+ years of ASIC/SoC physical design experience (8 years with MS or 5 years with PhD)
- Strong background in IC physical design, transistor layout, and design flows
- Expertise with Synopsys tools, particularly IC Compiler II
- Experience with place & route, CTS, timing closure, EM/IR methodologies, and DFM
- Proficiency with revision-control tools
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