Job Summary
A company is looking for an IP Design Engineer.
Key Responsibilities
- Develop soft IP for FPGAs using Verilog/SystemVerilog
- Integrate third-party IP cores into FPGA systems and create custom RTL wrappers
- Collaborate with Verification Engineers to verify IP and debug issues
Required Qualifications
- 7 to 12 years of experience in digital design
- Proficient in RTL coding using Verilog and/or System Verilog
- Strong background in digital design and micro architecture
- Experience with Xilinx FPGA and Vivado
- Preferred experience in the video domain (DisplayPort/MIPI/HDMI/SDI)
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