Job Summary
A company is looking for a DFT (Design for Test) Engineer 3.
Key Responsibilities
- Manage DFT aspects of ASIC design with a strong understanding of digital design concepts
- Ensure adherence to the ASIC development process
- Collaborate within a team environment to achieve project goals
Required Qualifications
- Bachelor's degree in Electrical or Computer Engineering with 8 years of experience, or a Master's degree with 6 years of experience
- U.S. Citizenship is required
- Experience in full product life cycle of ASIC Design
- Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as Tcl, Python, or Perl
- Experience with Cadence and/or Mentor test insertion and ATPG tools
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