Silicon Verification Engineer

Job Summary

A company is looking for a Silicon Verification Engineer.

Key Responsibilities

• Contribute to IP verification and write test cases using SystemVerilog and UVM
• Develop new test plans and provide feedback on existing ones based on complex architecture specifications
• Engage in UVM-based testbench development, including sequences, scoreboards, coverage, and assertions coding

Required Qualifications

• 2-10 years of experience in verification for SoCs, with knowledge of AXI/AMBA protocols
• 2-10 years of experience writing test plans for complex IP architecture
• 2-10 years of experience with UVM-based testbench development from scratch
• Strong coding skills in SystemVerilog and C, particularly in assertions and verification methodologies
• Ability to work independently and manage deliverables effectively